JPH0443355B2 - - Google Patents

Info

Publication number
JPH0443355B2
JPH0443355B2 JP59241002A JP24100284A JPH0443355B2 JP H0443355 B2 JPH0443355 B2 JP H0443355B2 JP 59241002 A JP59241002 A JP 59241002A JP 24100284 A JP24100284 A JP 24100284A JP H0443355 B2 JPH0443355 B2 JP H0443355B2
Authority
JP
Japan
Prior art keywords
refresh
signal
refresh operation
memory
request signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59241002A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61120396A (ja
Inventor
Takahiro Tokume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59241002A priority Critical patent/JPS61120396A/ja
Priority to EP85107211A priority patent/EP0164735A3/en
Publication of JPS61120396A publication Critical patent/JPS61120396A/ja
Priority to US07/228,880 priority patent/US4924381A/en
Priority to US07/441,577 priority patent/US4965722A/en
Publication of JPH0443355B2 publication Critical patent/JPH0443355B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Microcomputers (AREA)
JP59241002A 1984-06-11 1984-11-15 マイクロ・プロセッサ Granted JPS61120396A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP59241002A JPS61120396A (ja) 1984-11-15 1984-11-15 マイクロ・プロセッサ
EP85107211A EP0164735A3 (en) 1984-06-11 1985-06-11 A microprocessor having a dynamic memory refresh circuit
US07/228,880 US4924381A (en) 1984-06-11 1988-08-05 Microprocessor having a dynamic memory refresh circuit
US07/441,577 US4965722A (en) 1984-06-11 1989-11-27 Dynamic memory refresh circuit with a flexible refresh delay dynamic memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59241002A JPS61120396A (ja) 1984-11-15 1984-11-15 マイクロ・プロセッサ

Publications (2)

Publication Number Publication Date
JPS61120396A JPS61120396A (ja) 1986-06-07
JPH0443355B2 true JPH0443355B2 (en]) 1992-07-16

Family

ID=17067865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59241002A Granted JPS61120396A (ja) 1984-06-11 1984-11-15 マイクロ・プロセッサ

Country Status (1)

Country Link
JP (1) JPS61120396A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231090A (ja) * 1985-07-31 1987-02-10 Tokyo Juki Ind Co Ltd ダイナミツクｒａｍのリフレツシユ方式
DE19956240A1 (de) * 1999-11-23 2001-05-31 Bosch Gmbh Robert Verfahren zum Lesen und Auffrischen der Dateninhalte eines dynamischen Schreib-Lese-Speichers (DRAM) und Mikrocontroller mit einem Schreib-Lese-Speicher (RAM)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5178941A (en) * 1974-12-31 1976-07-09 Shimadzu Corp Konpyuutano ram rifuretsushuhoshiki
JPS544532A (en) * 1977-06-13 1979-01-13 Nec Corp Automatic refresh device of idle-time retrieval type
JPS5613587A (en) * 1979-07-11 1981-02-09 Toshiba Corp Refreshment system
JPS6194297A (ja) * 1984-10-16 1986-05-13 Matsushita Electric Ind Co Ltd ダイナミツクメモリ−のリフレツシユ装置

Also Published As

Publication number Publication date
JPS61120396A (ja) 1986-06-07

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term